 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| STK850 N-CHANNEL 30V - 0.0024 - 30A - PolarPAKTM STripFETTM Power MOSFET General features Type STK850 VDSS 30V RDS(on) <0.0029 RDS(on)*Q g 58.8 nC*m PTOT 5.2W ULTRA LOW TOP AND BOTTOM JUNCTION TO CASE THERMAL RESISTANCE VERY LOW CAPACITANCES 100% Rg TESTED FULLY INCAPSULATED DIE IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE PolarPAKTM Description This MOSFET is the latest development of STMicroelectronics unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, moreover the double sides cooling package with ultra low junction to case thermal resistance allows to handle higher levels of current. Internal schematic diagram Applications HIGH CURRENT VRM SINCHRONOUS RECTIFICATION DC-DC CONVERTERS FOR TELECOM Bottom View Top View Order codes Sales Type STK850 Marking K850 Package PolarPAKTM Packaging TAPE & REEL February 2006 Rev 3 1/12 www.st.com 12 Electrical ratings STK850 1 Table 1. Electrical ratings Absolute maximum ratings Parameter Drain-Source Voltage (VGS = 0) Gate-Source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Tj Tstg Operating Junction Temperature Storage Temperature Value 30 16 30 18.75 120 5.2 0.0416 -55 to 150 Unit V V A A A W W/C C Symbol VDS VGS ID Note 2 ID IDM Note 1 PTOT Note 2 Table 2. Thermal data Typ. Max 24 1 2.7 Unit C/W C/W C/W Rthj-amb Note 2 Rthj-c Note 3 Rthj-c Note 4 Thermal Resistance Junction-amb Thermal Resistance Junction-case (Top Drain) Thermal Resistance Junction-case (Source) 20 0.8 2.2 2/12 STK850 Electrical characteristics 2 Electrical characteristics (TCASE = 25 C unless otherwise specified) Table 3. Symbol V(BR)DSS IDSS On/off states Parameter Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate Body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-Source On Resistance Test Conditions ID = 250A, VGS= 0 VDS = Max Rating, VDS = Max Rating,Tc=125C VGS = 16V VDS= VGS, ID = 250A VGS= 10V, ID= 15A VGS= 4.5V, ID= 15A 1 0.0024 0.0029 Min. 30 1 10 100 Typ. Max. Unit V A A nA V IGSS VGS(th) RDS(on) 2.5 0.0029 0.0035 Table 4. Symbol gfs Note 5 Ciss Coss Crss Qg Qgs Qgd Dynamic Parameter Forward Transconductance Test Conditions VDS =10V, ID = 15A Min. Typ. 48 3150 940 90 24.5 8 8.2 32.5 Max. Unit S pF pF pF nC nC nC Input Capacitance VDS =25V, f=1 MHz, V GS=0 Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD=15V, ID = 30A VGS =4.5V (see Figure 14) Table 5. Symbol td(on) tr td(off) tf Switching times Parameter Turn-on Delay Time Rise Time Test Conditions VDD= 15V, ID= 15A, RG=4.7, VGS=4.5V (see Figure 15) VDD=15V, ID= 15A, RG=4.7, VGS=4.5V (see Figure 15) Min. Typ. 20 57 Max. Unit ns ns Turn-off Delay Time Fall Time 31 13 ns ns 3/12 Electrical characteristics STK850 Table 6. Symbol ISD ISDM Note 1 VSD Note 5 trr Qrr IRRM Source drain diode Parameter Source-drain Current Source-drain Current (pulsed) Forward on Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD= 15A, VGS=0 ISD= 30A, di/dt = 100A/s, VDD=20V, Tj=150C (see Figure 15) 39 39.8 2 Test Conditions Min. Typ. Max. 30 120 1.2 Unit A A V ns nC A (1)Pulse width limited by package (2) When mounted on FR-4 board of 1inch2 , 2 oz Cu and 10sec (3) Steady State (4) Measured at Source pin when the device is mounted on FR-4 board in steady state (5) Pulsed: pulse duration = 300s, duty cycle 1.5% PolarPAK is SILICONIX Trademark 4/12 STK850 Electrical characteristics 2.1 Electrical characteristics (curves) Safe Operating Area Figure 2. Thermal Impedance Figure 1. Figure 3. Output Characteristics Figure 4. Transfer Characteristics Figure 5. Transconductance Figure 6. Static Drain-source on Resistance 5/12 Electrical characteristics STK850 Figure 8. Capacitance Variations Figure 7. Gate Charge Figure 9. Normalized Gate Threshold Voltage Figure 10. Normalized On Resistance vs vs Temperature Temperature Figure 11. Source-drain Diode Forward Characteristics Figure 12. Normalized BVDSS vs Temperature 6/12 STK850 Test circuits 3 Test circuits Figure 14. Gate Charge Test Circuit Figure 13. Switching Times Test Circuit For Resistive Load Figure 15. Test Circuit For Inductive Load Switching and Diode Recovery Times 7/12 Package mechanical data STK850 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 8/12 STK850 Table 7. PolarPAK (Option L) mechanical data Ref Millimiters Min. A A1 b1 b2 b3 b4 b5 c D D1 E E1 H1 H2 H3 H4 K1 K2 K3 K4 M1 M2 M3 M4 P1 T1 T2 T3 T4 T5 < 0 0.48 0.41 2.19 0.89 0.23 0.20 6 5.74 5.01 4.75 0.23 0.45 0.31 0.45 4.22 1.08 1.37 0.24 4.30 3.43 0.22 0.05 0.15 3.48 0.56 1.20 3.90 0.18 10 0.36 12 0 0.20 3.64 0.76 0.25 4.10 0.95 4.50 3.58 4.70 3.73 4.37 1.13 0.41 0.56 0.51 0.56 4.52 1.18 0.58 0.51 2.29 1.04 0.33 0.25 6.15 5.89 5.16 4.90 0.75 Typ. 0.80 Max. 0.85 0.05 0.68 0.61 2.39 1.19 0.43 0.30 6.30 6.04 5.31 5.05 0.019 0.016 0.086 0.035 0.009 0.008 0.236 2.226 0.197 0.187 0.009 0.020 0.012 0.020 0.166 0.043 0.054 0.009 0.169 0.135 0.009 0.002 0.006 0.137 0.022 0.051 0.154 Min. 0.030 Dimensions Package mechanical data Inches Typ. 0.031 Max. 0.033 0.002 0.023 0.020 0.090 0.041 0.013 0.010 0.242 2.232 0.203 0.193 0.027 0.024 0.094 0.047 0.017 0.012 0.248 0.238 0.209 0.199 0.022 0.016 0.020 0.022 0.172 0.044 0.178 0.046 0.177 0.141 0.185 0.147 0.008 0.143 0.030 0.010 0.150 0.037 0.007 10 0.014 12 9/12 Package mechanical data STK850 Figure 16. Package dimentions plus footprint 10/12 STK850 Revision History 5 Revision History Date 10-Nov-2005 19-Dec-2005 02-Feb-2006 Revision 1 2 3 First version Complete version Modified description on first page, mechanical data updated Changes 11/12 STK850 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 12/12 |
Price & Availability of STK850
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |